exxos's Atari, Amiga & retro forum

rubber_jonnie wrote: 14 Jan 2022 12:45 Sounds like an interesting prospect, do you have any links or other details?

Badwolf wrote: 14 Jan 2022 14:48

rubber_jonnie wrote: 14 Jan 2022 12:45 Sounds like an interesting prospect, do you have any links or other details?

When I was doing my accelerator development I needed a way to boot alternative ROMs without ripping out the Falcon's memory card all the time (tedious at best, likely to break something at worst).

Before I had my onboard flash, I built a cartridge port breakout PCB with a DIP48 footprint on it plus some optional logic to do the chip enable/A16 line.


Screenshot 2022-01-14 at 14.30.23.png


The idea was to allow me to mount a TSSOP flash chip in an adapter I already had and easily rewrite a cartridge.

Despite a small bug in the design (I inverted ROM3 and ROM4 IIRC), it did work after a minor modification, but it wasn't a looker:





However where it really came into its own was when built up another board, leaving off the ROM select logic chip, and instead fed A16,17,18 via fly wires from the motherboard and generated my own chip enable. I could boot the full 512k OS.

Now, there's no reason why you'd have to generate your own chip enable line. There is already one (technically two, but I'd be surprised if they weren't always asserted in pairs for the full 16 bits) going to the sockets you've removed. If you have an exxos diagnostic cart (or similar) where you can replace the ROM, take all the jumpers off and wire up your chip enable, and higher address lines, there's no reason you can't boot from an external ROM too.

In fact, by keeping the ROM under 128k [like EmuTOS cart version with the base address changed to E00000 -- see config.h], you'd probably only need to jumper one higher address line + the CE.

I'll send you one of my boards (if I have any left) if you like, but I don't think the pinout is particularly useful unless you have a DIP48-TSSOP48 adapter and a flash chip to hand.

Here's the pinout:-


Screenshot 2022-01-14 at 14.43.49.png


BW

exxos wrote: 14 Jan 2022 16:03 Isn't this based on the assumption that the lines to the cartridge port are unbroken though ?

If the CPU lines go from the CPU to ROM THEN to the cart port, then multiple lines to the ROM port may actually be broken as well as other parts of the system.

It is probably where @sporniket STE PCB layout could come in handy to check.

rubber_jonnie wrote: 14 Jan 2022 17:08

exxos wrote: 14 Jan 2022 16:03 It is probably where @sporniket STE PCB layout could come in handy to check.

I think I already downloaded his schematics, need to go through and look what goes where, the Atari STE schematics aren't great.

exxos wrote: 14 Jan 2022 16:03 Isn't this based on the assumption that the lines to the cartridge port are unbroken though ?

sporniket wrote: 14 Jan 2022 17:29 If you can, use the kicad project too, the pcb is not accurrate, but the path of the traces follows the same waypoints, and the highlight net function should be helpful.

sporniket wrote: 14 Jan 2022 17:29

rubber_jonnie wrote: 14 Jan 2022 17:08

I think I already downloaded his schematics, need to go through and look what goes where, the Atari STE schematics aren't great.

If you can, use the kicad project too, the pcb is not accurrate, but the path of the traces follows the same waypoints, and the highlight net function should be helpful.

Badwolf wrote: 14 Jan 2022 18:53 Looks like the data lines go via the ROM to the DMA chip and to U632 (which has a function related to the half moons, but I'm not familiar with it).

BrettRogersUK wrote: 14 Jan 2022 19:05 A brilliant source of information.