Crumbs, I take a weekend off and four pages go by!
Sounds like DML has gone to town on the testing programs. :lol:
exxos wrote: 12 Nov 2022 03:20
I'm not sure how the RAM is orientated in RAM :lol: on the STFM you have 16 chips 1 bit each. It makes up 512k. So when the other 16 chips are fitted, it uses a high bank CAS1H CAS1L. Then to add more RAM you have MAD9 in play for 4MB. At which point I assume its 1MB banks which are selected with RAS/CAS.
The falcon loses me :lol: I assume having more addresses and 32bit that its in blocks of 4MB then bank switches. So for there to be a 1MB chunk missing every 4MB.. I'd assume MAD10 is broken or a bank select RAS/CAS ... I dunno.. @Badwolf translate :lol:
Without specific knowledge of VIDEL (which
@ijor may have?) there's no way of inferring which bit of which address ends up where from purely logical deduction.
VIDEL can organise its row and column multiplexing however was convenient at the time and the data lines wouldn't necessarily correspond to the bus data lines.
By way of example on DFB1 the row and column multiplexing changes between firmware and providing the individual bits within each bytes are all kept together, the order of the bits can vary between 'bus bits' and 'chip bits'.
Prior knowledge is required.
exxos wrote: 13 Nov 2022 21:09
Is bit11 in the videl actually used for starters ? I think you said your program used true colour, so it would never register on those faulty bits ?
...
There is something else which may have to be considered here.. That bit11 assuming testing in 16 bits.. Actually has a high and low word.. Assuming this will mean that bit11 could actually be bit 27 in a different RAM chip :stars:
In 16-bit video mode each pixel is 16 bits and they're packed adjacent to each other, so it does fill the memory. You were quoting the VIDEL registers which store each palette (in the indexed modes) as RGxB (32bit). Not relevant in this case as they're not used for 16 bit mode and they're not in DRAM anyway.
My understanding of the bit11 problem is the other way around, however. The Falcon's RAM is 32 bit, accessed by VIDEL as such and is I believe interleaved cleverly to increase access speed (
@mikro may be able to enlighten us her). That would mean that bit11 on the data bus actually spans two different chips. If you were seeing a bit11 error on every single RAM access, then that *would* be odd!
... going to digest the rest of the thread now.
BW