Re: Atari 520 STE Harddrive (ACSI2STM project) not detected at all
Posted: 15 Oct 2024 21:55
For the moment I have an issue - my recompiled firmware doesn't work.
Looks some libs or environment incompatibility. I will check and solve it later.
In meantime, I got digital analyser and recorded the boot session on ACSI port of STF and STE. I have some observation, maybe someone from you can review and find some conclusions.
As base I followed by instruction for test ST hardware: https://github.com/retro16/acsi2stm/blo ... hooting.md
1) No ACSI2STEM connected:
* STF: shows exact 8 CS pulses with perfect timing 250ns/50ms,
* STE: 8 CS pulses with timing 250ns/120ms.
The rest of signals like A1, IRQ, DRQ, ACK corresponds perfectly to CS as required on both.
The question the ACSI2STM is ready to have 120ms spacing on init? Or we have to find a reason why 120ms spacing in STE. Yes instruction says 50 ms more/less, but it's more then two times more!!!
2) Connected ACSI2STM
* STF: here both devices start talking and it works,
* STE: I can find 6 CS pulses, one "coated" with low A1 then, assume ACSI2STM sends low IRQ. What is really strange to me. It looks some way the ACSI2STM is not ready for my STE timing. Not sure the reason is in degradation of ICs or caps?
Do you have any idea how to explain it?
I can share captured signals if someone want to looks into.
Looks some libs or environment incompatibility. I will check and solve it later.
In meantime, I got digital analyser and recorded the boot session on ACSI port of STF and STE. I have some observation, maybe someone from you can review and find some conclusions.
As base I followed by instruction for test ST hardware: https://github.com/retro16/acsi2stm/blo ... hooting.md
1) No ACSI2STEM connected:
* STF: shows exact 8 CS pulses with perfect timing 250ns/50ms,
* STE: 8 CS pulses with timing 250ns/120ms.
The rest of signals like A1, IRQ, DRQ, ACK corresponds perfectly to CS as required on both.
The question the ACSI2STM is ready to have 120ms spacing on init? Or we have to find a reason why 120ms spacing in STE. Yes instruction says 50 ms more/less, but it's more then two times more!!!
2) Connected ACSI2STM
* STF: here both devices start talking and it works,
* STE: I can find 6 CS pulses, one "coated" with low A1 then, assume ACSI2STM sends low IRQ. What is really strange to me. It looks some way the ACSI2STM is not ready for my STE timing. Not sure the reason is in degradation of ICs or caps?
Do you have any idea how to explain it?
I can share captured signals if someone want to looks into.