exxos's Atari, Amiga & retro forum

exxos wrote: 22 Sep 2020 23:27 I just decode the whole address bus and address zero for ROM access. Think other decoders still use the GLUE to decode address zero, and not sure if they decode more than just the ROM area or not.

Thanks.

exxos wrote:Have you considered @cmorley USB ROM board, or @DoG decoder.. would just seem easier than reinventing the thing again.

Height mainly.

@PhilC was interested in @derkom 's Stacy relocator which is able to switch between the TF536 and the 68000 so I was thinking of starting with that and then adding ROM decoding so as not to have a stack close to the front edge of the board as this would prevent the top shield going back on and may impinge on the bottom of the keyboard.

There's also possibly an issue with the TF536, once relocated to be south of the PSU, might interfere with the dualtos ROM board, so bringing the ROM onto the relocator may be useful too. The address bus is going to have to be decoded anyway so there's very little extra overhead putting a 16 bit EEPROM on the board. It also keeps the number of connections down, which is always a good thing.

OK, as I understand it, for the decode:

Reset:

The MMU asserts ROM for the first 4 read cycles. So, if ROM is asserted, along with RD, /AS, /UDS and /LDS I could stuff 0x0e into the top of the address bus and let the rest of the decode deal with itself.

Address decode:

If RD, /AS, /UDS and /LDS and the top byte of the address is 0e then assert /CE on the ROM, passing the correct address to the ROM, wait and then assert /DTACK. Wait for /AS to go high and then deassert /DTACK.

I'm guessing a little counter clocked by the CPU clock pin will be good enough to generate the wait so that the ROM data is guaranteed correct.

Or at reset does it even need to be that complicated?

If the ROM line is enabled just bypass the address decode and just do a read cycle as if the addresses ranged matched? Is there anything at 0x00000000 which would contend when read?

OK, I've seen the document DoG referred to. I can work it out, I think.

@exxos, your dualtos ROM I guess switches between the two ROM images using the top address line being set high or low?

Do you know what the part number is off hand, so I can look up the pinout on the PLCC socket? (AT27C2048?)

Its just a 4096 PLCC ROM.. Bank switch is a17 I think.

exxos wrote: 23 Sep 2020 19:57 Its just a 4096 PLCC ROM.. Bank switch is a17 I think.

Thanks!