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Re: Looks like I'll be getting a Mega ST4 soon
Posted: 15 Feb 2020 19:22
by PhilC
/CE doesn't stay low, you should see it pulse as an indication data is being read.
Edit:
Do you see activity on the address lines on the rom and the mad lines on the MMU at all? Just wonder if its trying but not getting what it wants? You should see activity on the MAD lines regardless or /halt if I remember correctly.
Re: Looks like I'll be getting a Mega ST4 soon
Posted: 15 Feb 2020 20:02
by rubber_jonnie
@PhilC Not sure but I'll have a look, thanks.
EDIT. Sorry, just remembered, the /CE line goes low and stays there. On a working machine it strobes as to described.
Re: Looks like I'll be getting a Mega ST4 soon
Posted: 16 Feb 2020 00:19
by exxos
I think you need to try hardwiring the bus to get things in a known state as I suggested. CE going low and staying there means the CPU isn't getting DTACK, in which case GLUE will issues BERR which you also say doesn't happen..( I don't remember if BERR completes the bus cycle, the 68000 datasheet would say, buts its not really relevant at this point..) in anycase, thats a conflict of whats possible to happen :) Well, unless CE is actually shorted out to GND somewhere I guess.
The very first time /AS goes low (system wide) it should have all address lines low and GLUE records that address and will set CE and DTACK low at the same time. About 2 CLK8's later the CPU will set /AS high and CE & DTACK will go high from the GLUE (and CPU) . Thats the first bus cycle done.
The CPU should start the next bus cycle where the same thing happens, but it will jump to the start of the ROM address for TOS104. If the address or data is corrupted, it will fail and the CPU will basically crash.
If the CPU gets bad data from address zero, it could for example try to jump to a invalid place anywhere in the 16MB range of the CPU, or just try to run junk commands and crash.
Re: Looks like I'll be getting a Mega ST4 soon
Posted: 16 Feb 2020 09:38
by rubber_jonnie
I'll be trying this today if power comes back on!
EDIT: Still no power, and estimated time back on is 15:00. Not impressed at all 😟
Re: Looks like I'll be getting a Mega ST4 soon
Posted: 16 Feb 2020 13:49
by rubber_jonnie
exxos wrote: 16 Feb 2020 00:19
I think you need to try hardwiring the bus to get things in a known state as I suggested. CE going low and staying there means the CPU isn't getting DTACK, in which case GLUE will issues BERR which you also say doesn't happen..( I don't remember if BERR completes the bus cycle, the 68000 datasheet would say, buts its not really relevant at this point..) in anycase, thats a conflict of whats possible to happen :) Well, unless CE is actually shorted out to GND somewhere I guess.
The very first time /AS goes low (system wide) it should have all address lines low and GLUE records that address and will set CE and DTACK low at the same time. About 2 CLK8's later the CPU will set /AS high and CE & DTACK will go high from the GLUE (and CPU) . Thats the first bus cycle done.
The CPU should start the next bus cycle where the same thing happens, but it will jump to the start of the ROM address for TOS104. If the address or data is corrupted, it will fail and the CPU will basically crash.
If the CPU gets bad data from address zero, it could for example try to jump to a invalid place anywhere in the 16MB range of the CPU, or just try to run junk commands and crash.
@exxos Yes, I'm going to try and do this today. I never see BERR change, so I need to look at the state table in the datasheet to try and see what's what.
Power has been off since about 09:30 and just back on in the last 30 mins, so working up to doing this.
Re: Looks like I'll be getting a Mega ST4 soon
Posted: 16 Feb 2020 19:36
by rubber_jonnie
I managed to get some stuff done today, despite the power cut.
So CPU removed and all the suggested lines pulled down to 0v.
- IMG_20200216_163235.jpg (153.46 KiB) Viewed 4099 times
The ROM02 line is asserted at the Glue, which matches a good machine, and the Lo0 and Hi0 roms show as that line being asserted, or low.
BTW I checked the Glue and MMU in another machine using the diag cart and all is good.
The MAD lines are busy even when there is no CPU installed BTW.
What I have noticed is that on a good machine, on reset D0 strobes. On the Mega 4 it tries to strobe, but the voltage is very low,and you can just about see it, but it's barely there. The address and data lines and the AS lines strobe very briefly on reset before HALT is asserted and everything stops.
I'm thinking D0 is the problem and it's causing crap or nothing on the data bus and the CPU drops into a halted state.
More work to be done, if only there wasn't a power cut today!!
Re: Looks like I'll be getting a Mega ST4 soon
Posted: 16 Feb 2020 21:43
by exxos
If you now measure the voltage on the databus, it should read back as the start of ROM which is $60 on the high byte, $2E on the low or
$60 = %1100000 (high D15-D8)
$2E = %0101110 (low D7 - D0)
Re: Looks like I'll be getting a Mega ST4 soon
Posted: 17 Feb 2020 00:09
by Tomswork
Just an old memory I remember reading that some of the sil resistors can go way out of range and cause the problem described
Tom
Re: Looks like I'll be getting a Mega ST4 soon
Posted: 17 Feb 2020 09:00
by rubber_jonnie
Tomswork wrote: 17 Feb 2020 00:09
Just an old memory I remember reading that some of the sil resistors can go way out of range and cause the problem described
Tom
Thanks Tom, I already replaced them. I found removing the old ones, one had split, and was hoping that would be the fix, but no such luck.
Re: Looks like I'll be getting a Mega ST4 soon
Posted: 17 Feb 2020 09:04
by rubber_jonnie
exxos wrote: 16 Feb 2020 21:43
If you now measure the voltage on the databus, it should read back as the start of ROM which is $60 on the high byte, $2E on the low or
$60 = %1100000 (high D15-D8)
$2E = %0101110 (low D7 - D0)
@exxos I presume this is with the rig in place and no CPU fitted?
So I need to measure the voltage on all the data lines and record the values?