exxos's Atari, Amiga & retro forum

@sporniket Nope. Its more of a diagnostic tool.

Silly me, I forgotten about the initial post... **oops** :oops:

So welcome to my 60+ channel Bus Sniffer :) With its massive sample depth of .. well.. 8! :lol:

I really did not fancy having 60 wires hanging off the board, then having trouble of actually finding a logic analyser to do what I wanted, plus the hassle of fighting with iffy software on the PC all the time.. I don't have space for any more "stuff". So this just makes a "all in one" tool which is exactly what I need.

So this board can be configured to sample the entire CPU bus based upon a triggers such as address strobe, or constant sampling mode using CLK8, or trigger from a external source ( which is actually what I want to do anyway). I have a HALT option as well. So you can sample the bus 8 times and then it will automatically halt the CPU.. This allows you to look at the binary sequences on the LED banks.. Then you can press the resume button which will un-halt and then run the next eight bus cycles before it automatically halts again.

This board should also be useful for debugging H5's etc.. as you can use the external trigger on ROM_CE, so when the machine first powers up and it accesses wrong, it can sample the bus eight times then halt, then you can review the sequences to see if they are correct or not.. If one LED is either on all the time or off all the time, you know exactly which bit is acting up.

As I had a few latch pins spare, you can even sample up to 6 other signals anywhere else on the motherboard.. I also put in LED's which will both be on if the 8MHz clock and E-clock are pulsing HI/LO as expected.. Obviously if the clock is stuck high or low, only one LED will be on. So it makes a quick indication that the clocks are working correctly on the CPU..

They are certainly not cheap to build, but I am getting five made if anyone is interested in obtaining one.. The latch chips are a lot of the cost.. I was initially going to use a PLD and Multiplex the LED banks.. But using one did not simply have anywhere near enough IO pins.. so it would need 2 PLD's minimum.. they are not exactly cheap either.. Then hassle of soldering it, then doing 2 lots of firmware... I just really could not be bothered. Aside from making the board a little larger and more expensive, it is just quicker and easier to do it this way. Really it needs a FPGA.. but to get this board in production ASAP because I needed to use as a debugging tool..

Slightly better view :)

What are the ICs out of interest?

PhilC wrote: 24 Nov 2020 13:47 What are the ICs out of interest?

LS374.

Ok cool, answers how you were going to latch it all.

Wouldn't it route more easily with 574 rather than 374 latches?

I know how much you love hand routing these boards....

JezC wrote: 24 Nov 2020 16:59 Wouldn't it route more easily with 574 rather than 374 latches?

Yep 574 was the ones I used..

Hope you got the resistor networks values right otherwise its going to be one very bright board :)