exxos's Atari, Amiga & retro forum

exxos wrote: 11 Nov 2022 21:44

Badwolf wrote: 11 Nov 2022 21:40 So maybe there's something in this.

Possibly yes... Like I said earlier seems to be a lot of noise on the top right VCC pin.. Maybe you could scope that ?

Top right from the top or bottom? Do you mean chip northeast?

Anyway, I made a mistake -- I forgot to reset OPTION2 so the better result was with CPU not slowing down. Fitted OPTION2 and it failed on the first ftrig function again :/

BW

I managed to load your files in ki-cad @Badwolf ..


You basically need to lose that short ground track and have the via as close to the pads (or even under it) as possible. Even using multiple vias.

Moving the capacitor physically closer to the pin on the VCC will help also.

But technically how it is wired is not actually correct. Easier said than done, but power should always go to the capacitor first, and then to what it is supplying. Technically on yours you have it backwards where it is supplying the FPU power pin, THEN going to the cap. So is direction is actually backwards. But this isn't so simple because the FPU pin is connected to VCC directly anyway. So the only compromise you can really make is putting multiple vias on the VCC on the cap pad.. And if you really want to get posh, Instead of having one track in the centre going from the cap to FPU pin, have 2 tracks on the outer side of the cap.. Basically two tracks in parallel which will halve the inductance.

So basically the white circles are where you should put small vias.. And the two red tracks denoting lower inductance path. He should be as straight as possible. Of course the capacitor should be moved as physically close to the pin as possible... And every power pin should have its own capacitor.. I generally use 2.2uF these days instead of 100nf.

exxos wrote: 11 Nov 2022 21:58 I managed to load your files in ki-cad @Badwolf ..

... snip ...

So basically the white circles are where you should put small vias.. And the two red tracks denoting lower inductance path. He should be as straight as possible. Of course the capacitor should be moved as physically close to the pin as possible... And every power pin should have its own capacitor.. I generally use 2.2uF these days instead of 100nf.

Ah ok, I see. Thanks for that. Will have to have a think about how all that trades-off if capacitance does prove the key.

BW

That hasn't helped...

Badwolf wrote: 11 Nov 2022 22:17 That hasn't helped...

:lol:

Badwolf wrote: 11 Nov 2022 22:16 Ah ok, I see. Thanks for that. Will have to have a think about how all that trades-off if capacitance does prove the key.

These things can be a royal PITA. I guess technically the impedance from the pin directly connected to VCC is lower than the impedance to the capacitor. Basically would mean removing the capacitors would have little or no effect on that basis.

Also technically, VCC plane should be connected to the capacitor directly, but then the FPU VCC pins connected to the capacitor directly and not actually stitched to the VCC plane directly. If that makes sense...

This way the FPU VCC pins have no choice but to obtain the current from the capacitors and not directly from the power plane.. Hence the term really "decoupling".

exxos wrote: 11 Nov 2022 22:27 Also technically, VCC plane should be connected to the capacitor directly, but then the FPU VCC pins connected to the capacitor directly and not actually stitched to the VCC plane directly. If that makes sense...

I knew I should have used the SMD sockets!

BW

Badwolf wrote: 11 Nov 2022 22:31 I knew I should have used the SMD sockets!

But they are harder to solder :lol:

But yeah, it does beg a interesting point that the SMT sockets probably have less "lead inductance" than the through-hole types. Indeed you could have the capacitors directly under all the power pins as well then... Power on a internal layer.. Going through a via to the cap.. Then on top of the via is the SMT socket..

... And to the think, things were going all so well until you sent me the DFB1 :lol:

There's still an alternative (I used it on r3): if you want an FPU you connect specially provided pad to pin 3 on U62. That will let you use the internal FPU at 16MHz and shut-yer-noise.

Then I don't have to put any capacitors on any FPU sockets! :lol:

BW

Badwolf wrote: 11 Nov 2022 22:42 There's still an alternative (I used it on r3): if you want an FPU you connect specially provided pad to pin 3 on U62. That will let you use the internal FPU at 16MHz and shut-yer-noise.

Then I don't have to put any capacitors on any FPU sockets! :lol:

:chairsmack: