Re: Smonson's slow H4 build
Posted: 26 Mar 2021 12:04
You don't need to delay it, not unless you're using a booster to speed up ROM ( but that can be fixed in the booster anyway) , as the CPU will not pick up the data for 100+ns anyway.
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You don't need to delay it, not unless you're using a booster to speed up ROM ( but that can be fixed in the booster anyway) , as the CPU will not pick up the data for 100+ns anyway.
What about /OE though? Just tie it to ground?
Yes, I believe so. That part is from the schematic provided by the original author (Ted Rossin). By ROM_OE, do you mean LDS/UDS?exxos wrote: 26 Mar 2021 12:00 If you are just using U4 for DTACK.. I really would not bother, just use a diode and tie to ROM_OE...
You can tie CE to GND.. OE is used to enable the ROM.. then put a diode to The same signal with a diode then you can pull DTACK low as well.
I used the GAL to do the address decoding, which controls /OE and the /AS line to run /CE on the ROM. (This matches the timing diagram as /CE should be before /OE.) This meant that the ROM was primed to output whenever an address appeared on the bus. It was then up to the GAL to decode the address or /ROM2 along with /RW to determine if it's a read operation so as to enable the output from the ROM (/ROE in my schematic). This same signal was used to enable /DTACK via the 74LS244.
Ah, got it. Like this, yeah? (ignoring the signal naming of "CE" which is now misleading)exxos wrote: 26 Mar 2021 12:35 You can tie CE to GND.. OE is used to enable the ROM.. then put a diode to The same signal with a diode then you can pull DTACK low as well.
I could go down the custom route using a cheap CPLD, but using "F" high-speed logic seemed a lot more bullet-proof. I also can't stand soldering the EQFP packages on MAX Vs :)stephen_usher wrote: 26 Mar 2021 12:40
I used the GAL to do the address decoding, which controls /OE and the /AS line to run /CE on the ROM. (This matches the timing diagram as /CE should be before /OE.) This meant that the ROM was primed to output whenever an address appeared on the bus. It was then up to the GAL to decode the address or /ROM2 along with /RW to determine if it's a read operation so as to enable the output from the ROM (/ROE in my schematic). This same signal was used to enable /DTACK via the 74LS244.
Yep!Smonson wrote: 26 Mar 2021 12:51 Ah, got it. Like this, yeah? (ignoring the signal naming of "CE" which is now misleading)
Sweet, thanks! Let's just pretend that says OE there. It's just a net name!
For this particular application, I really would suggest using slower LS types... With them being lower power and slower they are a lot less "noisy".
Alright, I'll take your advice on that too. Thanks again!exxos wrote: 26 Mar 2021 12:58 For this particular application, I really would suggest using slower LS types... With them being lower power and slower they are a lot less "noisy".