exxos's Atari, Amiga & retro forum

PhilC wrote: 01 Mar 2021 18:25 @exxos that looks familiar?

Well you built it for me! :lol: :chairsmack:

It seems to run fine with TOS206 , So not sure issues start until maprom is used. I think it mapping low ram variables might be the problem. If someone could compile a version which just maps ROM into RAM and installs TT RAM, then I could try it out..

I've been working on rev5 this past week. Mostly doing changes to the IDE stuff and fixing the cable swap issue. I've removed the resistor packs on the bottom and relocated the buffers there in the hope JLC can fit them..

I still need to solder the ROM socket back on..hopefully soon.. Then see if it can boot up off the onboard ROM. If all goes well, I hope rev5 will make it into a small production run.

exxos wrote: 24 Mar 2021 13:36 It seems to run fine with TOS206 , So not sure issues start until maprom is used. I think it mapping low ram variables might be the problem. If someone could compile a version which just maps ROM into RAM and installs TT RAM, then I could try it out..

I thought that that's what 1.8 now did as that functionality in 1.7 was causing "issues", such as DMA not working.

stephen_usher wrote: 24 Mar 2021 16:28 I thought that that's what 1.8 now did as that functionality in 1.7 was causing "issues", such as DMA not working.

Didn't know there was more than 1 version..

Ahhh https://www.exxosforum.co.uk/forum/viewt ... =20#p54076 I've moved it from the Amiga forum to the ST one...

I wouldn't have thought the STRAM cache would have done much anyway as its 8MHz. But assume ROM being in TTRAM would be cached..

The IDE interface is now found. But I think there's a bad address line somewhere as it won't work if I use all 29 address bits, but works when using 26 :shrug: it could also explain the odd ROM issues I was having last week.. But then again, xlinix stuff is alien to me anyway :lol: :roll:

stephen_usher wrote: 01 Mar 2021 13:05 Anyway, it's good to see that development is continuing. Just out of interest, will the ROM interface 512K ROMs as well as twin 256K ones?

The first problem is A17 has a 2.2K pullup, so its simply GND the pin on the jumper to select bank zero.

So I will have to try and separate that into a 3 way jumper, then have a second to "ignore" high and low selects and wire A17 on the ROM to A17 on the CPU bus to allow 512K decoding.

stephen_usher wrote: 24 Mar 2021 16:28 I thought that that's what 1.8 now did as that functionality in 1.7 was causing "issues", such as DMA not working.

1.8 just locks up as it goes to desktop :( But I need to verify TT RAM is actually working somehow yet.


EDIT:

With FASTRAM.PRG loaded only, the floppy just starts going nuts. Files vanishing, re-appearing, wrong icons..

Right so after powering off the machine this time to remove MAPROM :lol: :roll: running FASTRAM.PRG doesn't seem to install the RAM.. if I do it in GB6 it works, I get 395% RAM speed.. So the FASTRAM.PRG isn't installing the RAM :(

EDIT:

Oh this is odd, now it worked, but GB6 had "?" on some results after loading.. but not TTRAM is found and 904% speed ...

EDIT2:

Not sure why the start address seems odd ?

@PhilC can you remember how much RAM you fitted to it ?

It started off so well as well ...

1111111111111011 fffb
1111101111111011 fbfb

so bit 11 in a RAM somewhere then ..