exxos's Atari, Amiga & retro forum

IngoQ wrote: 21 Sep 2017 15:07 So the logic to drive this would be located on the accelerator? Since I only see RAMs in there...

Yes, if you look at this image..

https://www.exxosforum.co.uk/forum/viewt ... 1152#p1148

You can see there is a large PLD on there already, this has the entire address bus rooted to it, which is needed for the fast RAM decoding. I only need to output chip selects to the fast RAM in order to make it work.

exxos wrote: 21 Sep 2017 15:08 Apparently so, oddly 14 hours a day working on Atari stuff isn't enough for some people, plus I actually have a day job as well :roll:

Don't you dare and take me seriously... Besides, we need a sarcasm-sign ;)

IngoQ wrote: 21 Sep 2017 15:10 Don't you dare and take me seriously... Besides, we need a sarcasm-sign ;)

I know you are not serious :) yes I will have a look for one..

Okay, so the ATMEL in this case replaces the MACH210. I was hoping someone else did something alike, so to say a Magnum with a current PLD like the Atmel. Only as a standalone version to interface with the CPU bus.

IngoQ wrote: 21 Sep 2017 15:17 Okay, so the ATMEL in this case replaces the MACH210.

Basically yes.

IngoQ wrote: 21 Sep 2017 15:17 I was hoping someone else did something alike, so to say a Magnum with a current PLD like the Atmel. Only as a standalone version to interface with the CPU bus.

I don't think so no. You still need a large PLD as they are 23 address pins, plus you need a few other control lines as well, plus chip enable lines, plus a few others for power etc so you still end up needing a pretty large PLD anyway. So if using a large PLD might as well have the booster and ROM decoding in their, aka V2.5 booster.

There's a similar situation with the the 2.2 booster. That people wanted simply a TOS 206 upgrade, but as I said to people in the past, by the time you have added the GALs and all the logic, you might as well add the ROM and CPU booster code into it as well. So in a way it becomes a bit pointless doing a separate ROM board. Not only that, it generates a lot more work as then 2 projects have to be completed instead of one.

You actually only need 2 address bit to decode Alt-RAM from 4 to 12 MB (giving you 8MB of Alt-RAM) So only A22 and A23 are needed to decode the Alt-RAM space. You might need a few more address pin to decode the different RAM CS based on the chip size but you don't need the whole 23 bit of address.
I have some half-done eagle schematics for a 8MB card for the Falcon and I had something similar for the first booster we did.
I can be done with a single XC9572XL-VQ64 (or similar like the ATF1502).

Rodolphe

rpineau wrote: 21 Sep 2017 16:41 I have some half-done eagle schematics for a 8MB card for the Falcon and I had something similar for the first booster we did.
I can be done with a single XC9572XL-VQ64 (or similar like the ATF1502).

I think you did send them to me already several months ago.

I guess the MAC210 isn't a very physically large PLD inking about it. So likely they did not the entire address bus either.

Even so, if a PLD is being used, might as well route all the addresses, and add a lot more extra features on there. Everyone has different needs or requirements, from my point of view, doing a more 'all in one solution' is a lot more beneficial, at least for me, in terms of time and expense.

Yep. My comment was mostly about the number of address line needed for the decoding. I'm not disagreeing that if you put a CPLD you might as well go for the whole thing.
Rodolphe

Just a thought what can this fast ram be used for on the ST?
Is there a lot of software that can make use of it?

It can't be used for video (screen), DMA and DMA sound on STE.
It also requires TOS 2.06 and program that can allocate memory from Alt-RAM (there are quite a few, but not games ) using the Mxalloc GEMDOS function.
It can of course be used by MiNT (I think that is the best use case for it).
Rodolphe