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Fixing my Milan 040 (or not) blog

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exxos
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Re: Fixing my Milan 040 (or not) blog

Post by exxos »

mrbombermillzy wrote: Sat Jun 28, 2025 11:20 pm Another cool option would be insanely high clock rate MC68000s. That would be cool. (I know you can do it @exxos ) :D

I wonder if watercooling and overvolting would get >75Mhz? :lol:
Already done but to many projects and not enough time.. But slapping on a fast cpu isn't going to help much. It needs a faster bus which is where I want the H5 Phoenix project to go.

But getting to far off topic now and I've already wrote loads about it all :)

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Re: Fixing my Milan 040 (or not) blog

Post by viking272 »

mrbombermillzy wrote: Sun Jun 29, 2025 9:14 am @dml That sounds about right. :)

I do vaguely remember the MOVE16 instruction being handy.
dml wrote: Sun Jun 29, 2025 1:02 am I'll need to fire up my Afterburner and get some measurements to compare. It's a 32/40MHz system but a decent ratio can be figured out from that :)
That would be interesting. The 040 doesnt really get much attention nowadays.
The 040 is a rare and mythical machine in the Atari world which was a great shame.
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Re: Fixing my Milan 040 (or not) blog

Post by peters »

Theoretically the 68060 can run at 4x clock speed, so 25/100 is possible. I've no idea if it could be done or if it would work.
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Re: Fixing my Milan 040 (or not) blog

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I wonder though.. While caches improve speed as the cpu doesn't have to read slow RAM as often.. But if you had a 50mhz bus with a 50mhz CPU.. What's the speed gain of caches then?

I'd assume it still be a gain as the cpu doesn't have to do full bus cycles to get data.

I'm just thinking that the faster the bus is the less effective caches become.
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Re: Fixing my Milan 040 (or not) blog

Post by dml »

exxos wrote: Sun Jun 29, 2025 12:08 pm I'm just thinking that the faster the bus is the less effective caches become.
That is the case, yes. The gain depends on the waitstates for the external memory. There are some other factors which make the CPU cache faster - it's on the die and part of the execution pipeline after all and is checked before it decides to begin an external bus transaction - but the gain will be a lot less if external ram is 0 waitstates @ 32bit.
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