BLITTER RE-CREATION THOUGHTS

[rpineau]

The MAX10 has an internal flash so you don't need an external eeprom to store the code.
So you use the JTAG connection to either push the code to the RAM to test ro the flash when done.
There is probably a few pins to connect to ground/vcc to select which mode you're in.
I haven't look at it closely .

[exxos]

The MAX10 has an internal flash so you don't need an external eeprom to store the code.
So you use the JTAG connection to either push the code to the RAM to test ro the flash when done.
There is probably a few pins to connect to ground/vcc to select which mode you're in.
I haven't look at it closely .

So just need to add JTAG connector like normal then..

But at what point does the eeprom come into it all, looks like the cyclone uses it, but why ? Maybe devices get to large for internal flash or something ? :shrug:

[rpineau]

Some FGPA do not have internal flash, or not enough to hold the whole code. That's when they need external EEPROM.

[Smonson]

But at what point does the eeprom come into it all, looks like the cyclone uses it, but why ? Maybe devices get to large for internal flash or something ? :shrug:

Another reason is that the end user's total flash storage space requirement is not known, so this way they can choose an appropriately-sized flash device that includes the fpga configuration data, program code for soft CPUs, and other data assets all in one device.

[exxos]

Another reason is that the end user's total flash storage space requirement is not known, so this way they can choose an appropriately-sized flash device that includes the fpga configuration data, program code for soft CPUs, and other data assets all in one device.

Makes sense, though also annoying as its a extra part.. I assume the next part from the MAXX10 series is the cyclone and all those need external flash. thankfully I am ok for now. Though when cores start getting more integrated, I will have to go with cyclone..

[mrbombermillzy]

Well, one thing to bare in mind , is the blitter "isn't" a video generator of any kind.. it doesn't really know anything of resolutions and colours.. its a device to basically shift and edit blocks of data to and from ram quickly... There may not be any other functions which could be added...

Yeah, dont mind me. I should just quit posting stuff. For some reason I was thinking of a Shifter re-creation. Even then some of that stuff was pushing it a bit :oops:

[exxos]

Spending today routing this board...

Buffers on top of the board (red layer) and FPGA on bottom (blue layer).

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Top route highlighted.

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Bottom route highlighted.

d2.JPG

So routing should be doable, albeit very time consuming..

I still need to add the 3.3V regulator and JTAG header, but also much routing to do yet anyway..

I might be able to squash the regulator in a corner.. though the JTAG header will take a lot of room, I *might* just have some solder wires on the pcb as once programmed it shouldn't need editing again anyway.

[rpineau]

Isn't part of the idea of using a FPGA is to be able to also add new function to the blitter .. thus reprograming it as needed ... which requires a JTAG header ... sorry to be a party pooper ;)

[exxos]

Isn't part of the idea of using a FPGA is to be able to also add new function to the blitter .. thus reprograming it as needed ... which requires a JTAG header ... sorry to be a party pooper ;)

Yeah, but when/if that will happen ? Not important for now really either way.

[exxos]

Getting there...

Nice space right in the middle for the 3.3V reg :)

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