Mega ST4 - no video output at all

[asapreta]

Yay!!!!

I knew that you'd get there in the end.

If you don't have a digital oscilloscope the logic analyser is an excellent instrument to see what the system is doing and if it's trying to run code.

If the LA had just shown only a few reads and then stopped then this would have meant that the CPU wouldn't have been able to read the ROM. Running for a whole 100ms means that it was trying to run stuff for quite a while until it stopped, so the system must be working to some degree.

Without being able to instrument the whole of the data bus plus /AS and /DTACK and knowing what the data is supposed to be (such as the ROM values) it would be very difficult to diagnose a RAM fault if the chip isn't totally dead or pulling the bus hard high or low. So, at this point it is a fact that you either use a spare set of chips and try piggybacking as a start or just remove them all, install sockets and test the chips in a tester.

You went through everything which could be done non-destructively, so desoldering was the only way to go.

Thanks for the help throughout all the posts!

I have plans to by myself a digital oscilloscope in a few months.
But using the logic analyzer showed me how to get more information.

About the RAMs, that was my thought, if there is one "barely working", could lead us to the problem.

Now, the only thing I wish to understand is the missing CAS signals in this case.
But when the sockets arrive, I will try to get the signals with the logic analyzer.

[stephen_usher]

My guess is that when /HALT went low it caused the MMU to halt as well.

[ijor]

Great work. Congratulations!

Well I decided to follow my instincts and removed the first lower RAM (1-2 MB) 16 DRAMs ICs. And voilá, two bad ICs.
...
About the RAMs, that was my thought, if there is one "barely working", could lead us to the problem.

I'm not sure I understand. How you determined that those particular DRAM chips were bad?

But I suspect, being a 16bit machine, things are different, as it was for example, messing up the CAS signal.
Now, the only thing I wish to understand is the missing CAS signals in this case.

A bad DRAM chip is unlikely to corrupt CAS. It could happen, I guess, but that would be as (un)likely for 8-bit or 16-bit computers. As long as it's the same type of DRAM chips, it should be similar.

But there are four CAS signals. And any given chip, in the worst case, can affect a single CAS signal. And even then, in the case of the MegaST that these signals are buffered, this should not affect the CAS signals at the MMU pins. That's why I asked exactly where you were probing.

But when the sockets arrive, I will try to get the signals with the logic analyzer.

Once again, zoom-in the LA trace you already made with both CAS signals. Zoom enough so that single pulses could be visible, and post a picture. That could be revealing without doing any further work. Either it is noise, which means there is an electrical problem. Or either you do have CAS pulses after all at the MMU side.

My guess is that when /HALT went low it caused the MMU to halt as well.

No. It doesn't. You could see he scoped LOAD and there were still pulses after the CPU was already halted. Certainly nothing at all (well, except the clock) halts MMU completely. Ram refresh always keeps working.

[asapreta]

Guys, I haven't forgot to check the signals.

The new RAM has arrived in my country today and hope soon I have them in my hands.

The sockets are also under their way so, when all them arrive, I will install the sockets, install the bad RAMs back to put the computer as it was before and grab the information, so it may help other to fix their machines.

[Badwolf]

Cleaned the board, and after resoldering the first 16 DRAM ICs, BLAM! The magic of TOS in the screen!

:goodpost:

Well done! Good job on that desoldering.

BW