Upgrade or replace the ROM.
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Post by exxos »

There seems to be constant confusion over what chips can be used for EPROMs in various STs. This is actually confused myself for a while, basically because Atari mostly used "MASK ROMS" which are very similar to "EPROMS" but often the pinout is different and they are not compatible. It does not help either how Atari labelled up everything in the schematics, or things like the addresses start from A0 and other times A1. Basically total chaos!

I have seen that there are also similar OTP chips where they can have a inverted enable line.. But so far I do not think these have been used.. But maybe one thing which could catch people out should they come across them as the pinout can be totally identical but they're not actually the same electrically.

So first up I investigate the STM diagram uses the six chip ROMs.

256data.png (160.46 KiB) Viewed 5376 times

This may look confusing, and in some ways it is but I will try and explain..

Highlighted in red are the databus connections for both the mask ROM and the EPROM. On the left we have D0 on pin 11, which also matches the EPROM on the rights where D0 is also pin 11.. This match is for all the pins highlighted in red.

Similar with the address bus as highlighted in blue (I only listed one here prevent confusion) where A0 is on pin 10 on both chips.

Also OE and CE tend to be ones to watch out for as they can be in different places also.. But in both these chips OE is on pin 22 and CE is on pin 20.

So basically a 256K EPROM is actually fully pin to pin compatible with the OTP ROM's as used in the STM.

The confusion then comes in with the 010 MASK ROM's. The pinout is similar to a 010 EPROM, but EPROMs are generally two pins too long to fit. And fitting these tends to be a little bit "hacky".

The other numbers listed on their images which are not circle, the connections to the 68000 CPU itself. It gets more confusing as the ROM's start from A0 but the CPU actually starts from A1.

add.png (85.21 KiB) Viewed 5374 times

Highlighted in red is the address bus connections CPU side on the left, and ROM site on the right. Highlighted in blue is the address bus connections where I also put in the letter "A" in blue to prevent confusion.. So CPU side A1 goes to ROM side A0.. And this is repeated all the way up the address bus pins..

So we will take a look at the differences between the 010 MASK ROM and the 010 EPROM...

010.jpg (61 KiB) Viewed 5373 times

For starters, the EPROM is 32 pins whereas a mass ROM is only 28 pins. Mostly though the pinout is very similar other than some signals circled in blue for example.

Basically they can be made to fit such as shown below...

11.jpg (56.65 KiB) Viewed 5373 times

I'm not going to go into adapting these 010 32pin EPROMs in this thread as this is already documented my website anyway.
See the "archives" section around halfway down the page for adapting 32PIN EPROMs

Or a forum copy of the old guides. ... f=16&t=608 All my hardware guides - mods - games - STOS - All my hardware mods for sale - Please help support by making a purchase.
viewtopic.php?f=17&t=1585 Have you done the Mandatory Fixes ?
Just because a lot of people agree on something, doesn't make it a fact. ~exxos ~
People should find solutions to problems, not find problems with solutions.
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Post by krupkaj »

thank you for this thread and nice pictures with description :) This also confused me a lot in the past
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Post by tzok »

Actually, there existed a 1Mbit non-JEDEC compatible EPROMs, which had the same A16 and /OE pin locations as MASK-ROMs, these were 27C1000 and 27C301. /CE pin location (22) is the same with all 27C1001/010/1000/301 and the MASK-ROM (you are showing pin numbers for 28 pin 256kb MASK-ROM)... or maybe not?
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