Woohoo!
And a $50 credit is better than a poke in the eye with a sharp stick too.
Albeit it's probably cost you £200 in man-hours
BW
Woohoo!
I've seen that a few times. Too few CPU cycles between DMA requests on account of the bus arbitration overhead?exxos wrote: Mon Oct 13, 2025 1:33 pm This video I load the song play.. after a few seconds it dies.. I reload the song.. same again... "CPU overload" But why ? @dhedberg any ideas what's going on there ?
I feared that as wellBadwolf wrote: Mon Oct 13, 2025 1:55 pm I've seen that a few times. Too few CPU cycles between DMA requests on account of the bus arbitration overhead?
Not sure about the DSP. Still need to get to the bottom of it failing the cartridge test (which I'm slowly working towards), but I do wonder if there's a sweet spot of acceleration that would make Acetracker happy.exxos wrote: Mon Oct 13, 2025 3:22 pm I wonder if we overclocked the DSP at a higher clock it would claw back some cycles somewhere @Badwolf![]()
IIRC 40MHz worked worse than 50MHz if that helps..Badwolf wrote: Mon Oct 13, 2025 3:32 pm Not sure about the DSP. Still need to get to the bottom of it failing the cartridge test (which I'm slowly working towards), but I do wonder if there's a sweet spot of acceleration that would make Acetracker happy.
Eg, perhaps there are too few cycles between DMA accesses in 16MHz mode because of the arbitration overhead. Perhaps there are too many in 50MHz mode. So.. what if it could speed up to 19MHz, for example? Would a slightly faster clock offset the losses for switching and bus arb, for example?
Good luckI still have (somewhere) your dial-a-freq VCO. As and when I get time (ha!) I may try experimenting with that and Acetracker to see if I can rule that theory out.
Yeah, 40MHz would be way more cycles. I'd be aiming to see if there's a sweet spot that compensates for the dropped ones without falling off the other end of any cycle count expectation window.
Can't be done. Even ignoring the onboard CPU you need to go through the dance with the GALs. See my CPUless motherboard series.One possible way to rule out the bus-arb is to remove all that code, and go back to "hard wiring" the MB CPU HALT or whatever and try that.. but that would be a PITA anyway.
Yes, quite. But I'd like more evidence that fits the hypothesis or, perhaps more usefully, rules it out.If CUBASE & ACETRACKER are timing sensitive which they appear to be, we might just have to make such as "unfixable" as its the old problem that developers pushed every cycle out of the machine...