Thanks.. yeah I was wondering if DTACK was still being issued by the STE.. I will check that now..Badwolf wrote: 23 May 2025 12:57 I'm not sure if it's helpful at all but IIRC STEs decode (ie. issue DTACK) for the 0x00Dxxxxx range.
....
I get bus error for the 8MB mark. So nothing can be decoding it.
I can read and write to it with my logic, but its confused things as I swapped to using a IDE card, so the boot order must be different and BLTFIX locks up for some reason after my TOSCOPY happens.. I need to look into that more.. but to many problems.. not enough time currently..
Problem current is STOS is throwing up random bus errors on its own, and I am not sure what part of the code is causing it :( I think its glitches in the address causing all these random things to happen.
It complicated things as I also have to patch the IDE INT address... but that logic block is at least "working" now.
Code: Select all
always @(posedge CLK100M or negedge RESET) begin
if (!RESET) begin
SWAP_ON <= 1'b1;
DIS_BUS <= 1'b1;
data[7:0] <= 8'h00;
end else if (AS30 == 1'b1) begin
// Bus inactive ? release SWAP_ON
SWAP_ON <= 1'b1;
DIS_BUS <= 1'b1;
end else if (BUSEN_IRQ == 1'b0) begin
data[7:0] <= { D[7:6], 1'b0, D[4:0] }; // IRQ format - IDE light stays on and no AB if disabled
SWAP_ON <= 1'b0;
DIS_BUS <= 1'b0;
end else if (bus_en_patch == 1'b1) begin
data[7:0] <= D_from_patch; // test pattern 8'b11001100
SWAP_ON <= 1'b0;
DIS_BUS <= 1'b0; // disable bus
end else begin
SWAP_ON <= 1'b1;
DIS_BUS <= 1'b1;
end
end
// Drive the bus only when SWAP_ON is high
//SWAP_ON = 0 = D[7:0] = data[7:0].
//SWAP_ON = 1 D[7:0] is assigned 8'bzzzzzzzz
assign D[7:0] = SWAP_ON ? 8'bzzzzzzzz : data[7:0];
