Me too!! Otherwise I'll have a most perplexing problem on my hands! :lol: I'll have to resort to the old chicken sacrifice thing next..
I suspect the ground point being on the plcc socket at the bottom of the board isn't great. It means noise from the CPU passes the PLD and clock to get to GND. On the TF536 with the dip CPU, the GND is more on the middle left of the board. So there's likely less noise around the PLD then. I suspect as small of a issue it may be, it's likely added a few mV in the wrong places aggravating the problem. It's a bit of a guess though. I mean the thing has a board wide ground plane so it's not like much more could be done anyway.
I've added in more HF bypass caps around the osc as well on the next respin. Plus the osc will be run on a higher voltage which should counteract any gnd bounce issues..

