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CURRENT PROTOTYPE STATUS (SEC 64MHz 68000)

Information and news about the 68SEC000 64MHz booster.
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Badwolf
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Re: CURRENT PROTOTYPE STATUS (SEC 64MHz 68000)

Post by Badwolf »

exxos wrote: 19 Apr 2022 12:45 I've lost track whats what. The SEC booster was only resetting AFAIK when running 64MHz due to bus loading. It would run fine on 50MHz. The ACIA's are rated up to 2Mhz anyway, so they are not being " overclocked" as such. But obviously they are not being clocked at 500KHz either.
No, I was thinking about your CTRL-ALT-DEL and lingering keypress problem, but now I think about it that was the 536, so nevermind (I was wondering if something were triggering earlier because of the faster E clock).

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DFB1 Open source 50MHz 030 and TT-RAM accelerator for the Falcon
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Re: CURRENT PROTOTYPE STATUS (SEC 64MHz 68000)

Post by exxos »

Badwolf wrote: 19 Apr 2022 13:26 No, I was thinking about your CTRL-ALT-DEL and lingering keypress problem, but now I think about it that was the 536, so nevermind (I was wondering if something were triggering earlier because of the faster E clock).
ohhh, no, thats a bug in EMUTOS ;) :lol: They are looking into it for a fix, but doesn't seem a simple one.
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Re: CURRENT PROTOTYPE STATUS (SEC 64MHz 68000)

Post by czietz »

exxos wrote: 19 Apr 2022 13:31 ohhh, no, thats a bug in EMUTOS ;) :lol: They are looking into it for a fix, but doesn't seem a simple one.
It's fixed since commit/snapshot 20220410-162405-32ac9177:
https://github.com/emutos/emutos/commit/32ac9177c1d44945ba374cc4adc13fa4efe8c5f8 wrote: Ignore spurious Delete key press during info screen
czietz committed 9 days ago
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Re: CURRENT PROTOTYPE STATUS (SEC 64MHz 68000)

Post by exxos »

czietz wrote: 19 Apr 2022 13:52 It's fixed since commit/snapshot 20220410-162405-32ac9177:
https://github.com/emutos/emutos/commit/32ac9177c1d44945ba374cc4adc13fa4efe8c5f8 wrote: Ignore spurious Delete key press during info screen
czietz committed 9 days ago
Oh nice :bravo: Last I saw was some of the discussion about it all. I did not realise there had been a fixed done for it yet. Nice!
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Re: CURRENT PROTOTYPE STATUS (SEC 64MHz 68000)

Post by ijor »

exxos wrote: 19 Apr 2022 00:05 True. If you can suggest some to try I can run the CPU at 8mhz when I get chance. I would imagine faster CPU speeds will inherently break some stuff anyway.
Yes. Any accelerated CPU, even a simple 68000 at 16 MHz, will break anything that depends on cycle accuracy.
I assume running E-clock faster wouldn't break stuff but I don't know about timing sensitive stuff anyway.
It will break some stuff, but very few cases. Can't you reproduce the original E clock behavior? CPLD too small?
Bus grant works slightly diffently as well.
As long as it doesn't change the timing, it doesn't matter. If it does, at least some Blitter software will break. In theory, any change to the DMA timing might affect some copy protections as well, but I doubt there is in an actual software that depends on DMA being cycle accurate.
http://github.com/ijor/fx68k 68000 cycle exact FPGA core
FX CAST Cycle Accurate Atari ST core
http://pasti.fxatari.com
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Re: CURRENT PROTOTYPE STATUS (SEC 64MHz 68000)

Post by exxos »

Oops :chairsmack:

220427193517505.png
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Re: CURRENT PROTOTYPE STATUS (SEC 64MHz 68000)

Post by troed »

exxos wrote: 09 May 2022 11:07 Oops :chairsmack:
Room for future expansion!
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Re: CURRENT PROTOTYPE STATUS (SEC 64MHz 68000)

Post by Badwolf »

exxos wrote: 09 May 2022 11:07 Oops :chairsmack:
Ah, fudge. :cry:

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Re: CURRENT PROTOTYPE STATUS (SEC 64MHz 68000)

Post by Icky »

Damn those footprints - assuming it was a mis-configured one that is. The amount of times Eagle has incorrect footprints in libs.
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Re: CURRENT PROTOTYPE STATUS (SEC 64MHz 68000)

Post by olivier.jan »

Looks like an opportunity for a LOT of bodge wires :D
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