So my test machine was turned off all of yesterday and I turned it on this morning and it booted right up. Where they crashed after a few seconds in memory test. Rebooting the machine went as before a right effort.. Basically a lot of the time just garbage on the screen.
As a start I put the booster board in about 10 CPU sockets to lift it away from the motherboard to rule out interference.. This did not change anything..
I started to scope out the noise pulses in relation to other signals on the motherboard such as the main clocks.

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What we have here is the 4 MHz clock with address line 5. It looks like there is some relation there but there actually isn't. To save a bit of forum space, the 2 MHz clock was more in sync with the noise pulses but, the pulses were in the middle of the low part of the 2 MHz cycle. So it can be ruled out I think that this is any sort of 2 MHz related switching noise.
I also tried adding 100R in series with address line 5 scoped either side to see if I could work out where the noise was being generated, but I did not see much difference. I did a lot more testing, but I won't publish it here, as it was nothing much relevant..
What I did find was this between address line 5 and address line 6..

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This looked like a clue.. Basically thinking each address line is causing crosstalk onto other address lines as this is what the image looks like..
I measured the capacitance on my new booster board between those signals and read about 7pF. I also checked my original the 2.2 booster board, and measured 13pF there. As I have a lot of parallel traces on my new booster board, I decided rather than struggling trying to test every combination of track, I would assume 25pF as a reasonable value, so I just soldered a capacitor across address 5and 6 to see if I can cause more interference.. Long story short, I did not see any difference whatsoever.
I am not ruling out PCB capacitive coupling totally, as with so many address line switching would be generating a lot of interference with I cannot easily simulate.. And this point I am not ruling it out, but at the moment it seems unlikely to be the issue.. Most of the parallel traces are actually on the databus, which does not seem to suffer so much with this problem some reason, but I would need to look into it some more to confirm..
It would seem more like power rail noise, for example, all the address line switching up and down would cause ground bounce on the CPU, which I have seen before, and can easily spike 1 V. However I have done a lot of testing with ground points and power rails and do not see anything problematic there.
These pulses seem to be a lot more than just simply interference, as if it was simple interference between signals then it would not really take much to change the amplitude of them, such as adding the 25pF capacitance there.
One odd thing I have spotted is that the noise pulses do not seem to be there initially when the machine turns on. My TOS104 version is patched by
Peter show the TOS version and RAM size on power or where it delays for about 10 seconds before continuing to the desktop.. I need to investigate some more, while it is at that point and the address bus still switching, the noise pulses do not appear to be there.. As soon as ram test starts the noise is always there.
I did wonder if the noise is generated when the CPU is accessing the ROM for example. In part this was what I saw on the STE and actually let me to the new DMA investigations... In any case, I have not yet found a relation between accessing the ROM or not.
I also tried looking at the RAM isolation buffers, looking at the relationship between the noise and the MMU control signals to the latches.. I did not see anything there either..
My first guess, is that when the CPU is accessing some chip on the motherboard, interference starts on the bus somewhere. Again this is what I saw on the STE. But so far on the STFM I have not found a likely cause for this yet.
But there is still another problem, that when the original DIP CPU is in place, I do not see this noise. I have ordered a DIP HC CPU which I will just try in the motherboard to see if the noise problems get worse or not. The HC CPU should be easier to drive than the TTL, so in theory at least, any noise on the motherboard should be visible on the HC CPU A lot more.
I have designed a six layer version of this board and used the auto router, but the cheapest I can find get this manufactured is £150. Which I really do not want to spend for a third time this project..
So I will just have to see what happens with the HC CPU... If I do not see any noise there, noise has to be generated somehow on this new booster board.. But as to why this is, I really do not know..