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TF Riser Revision 0 Arrives

TF CD32 Riser

Moderators: terriblefire, Terriblefire Moderator

terriblefire
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Re: TF Riser Revision 0 Arrives

Post by terriblefire »

Ok into my stride with this now.
Screenshot 2020-03-21 at 17.41.31.png
We'll have

1. UART5 brought out to headers.
2. Changed RGB so that FMV is supported.
3. Direct ARM access to the data bus (CPLD does the address decode for it).
4. Keyboard lines wired direct to the ARM so it doesnt need to go through the CPLD.
5. Floppy lines brought out to the ARM (Experimental.. dont expect this to actually work).
6. UART4 wired to the Amiga UART.
7. Still have SPI comms between the CPLD and ARM but also have 9 spare pins for interrupts/comms.

I'll have a couple of spare pins so thinking i might look at putting an I2S sound card on there? Anyone have any suggestions of I2S DAC/ADCs?
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indicates how much hurting you shall receive."
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Re: TF Riser Revision 0 Arrives

Post by arkadiusz.makarenko »

terriblefire wrote: 21 Mar 2020 17:47 Ok into my stride with this now.

Screenshot 2020-03-21 at 17.41.31.png

We'll have

1. UART5 brought out to headers.
2. Changed RGB so that FMV is supported.
3. Direct ARM access to the data bus (CPLD does the address decode for it).
4. Keyboard lines wired direct to the ARM so it doesnt need to go through the CPLD.
5. Floppy lines brought out to the ARM (Experimental.. dont expect this to actually work).
6. UART4 wired to the Amiga UART.
7. Still have SPI comms between the CPLD and ARM but also have 9 spare pins for interrupts/comms.

I'll have a couple of spare pins so thinking i might look at putting an I2S sound card on there? Anyone have any suggestions of I2S DAC/ADCs?
:O
Do not trust people. They are capable of greatness.
~ Stanislaw Lem
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arkadiusz.makarenko
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Re: TF Riser Revision 0 Arrives

Post by arkadiusz.makarenko »

terriblefire wrote: 21 Mar 2020 17:47
3. Direct ARM access to the data bus (CPLD does the address decode for it).
May I ask what are you planning for this?

Arek
Do not trust people. They are capable of greatness.
~ Stanislaw Lem
terriblefire
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Re: TF Riser Revision 0 Arrives

Post by terriblefire »

arkadiusz.makarenko wrote: 21 Mar 2020 18:55
terriblefire wrote: 21 Mar 2020 17:47
3. Direct ARM access to the data bus (CPLD does the address decode for it).
May I ask what are you planning for this?
Pretty simple. CPLD decodes an address we want to patch. Holds the cycle and pokes an interrupt pin for the ARM.

ARM places or reads data from/to GPIO port B and pulses DTACK0. So instead of the SPI comms we can do things direct.

I've seen examples where DMA can be used to read/write from PORTB in the ARM so data could be moved in bulk but i dont see a need for it right now.
———
"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."
terriblefire
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Re: TF Riser Revision 0 Arrives

Post by terriblefire »

———
"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."
terriblefire
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Re: TF Riser Revision 0 Arrives

Post by terriblefire »

Ok for those struggling to visualize...
Screenshot 2020-03-22 at 12.12.21.png
SPI2_* connects to the CPLD for general purpose comms (maybe not necessary).

INTSIG_* are specific address decodes from the CPLD.

BUS_INT is an interrupt pin generated by the CPLD to tell the ARM to process a bus request.

Everything else is an ARM connection to an Amiga bus line.

I've not yet sorted out a potential sound card option. PA4 and PA5 are not 5V tolerant but they are DAC outputs if anyone thinks we can use them?

Again i dont know if everything will work. The goal is to make everything Arek needed to work and double up the USB ports. But i figured i'd wire up everything else too.

In addition this thing can be 80% assembled by the boardhouse.
Screenshot 2020-03-22 at 12.18.51.png
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———
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indicates how much hurting you shall receive."
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arkadiusz.makarenko
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Re: TF Riser Revision 0 Arrives

Post by arkadiusz.makarenko »

terriblefire wrote: 22 Mar 2020 12:17 Ok for those struggling to visualize...

Screenshot 2020-03-22 at 12.12.21.png

SPI2_* connects to the CPLD for general purpose comms (maybe not necessary).

INTSIG_* are specific address decodes from the CPLD.

BUS_INT is an interrupt pin generated by the CPLD to tell the ARM to process a bus request.

Everything else is an ARM connection to an Amiga bus line.

I've not yet sorted out a potential sound card option. PA4 and PA5 are not 5V tolerant but they are DAC outputs if anyone thinks we can use them?

Again i dont know if everything will work. The goal is to make everything Arek needed to work and double up the USB ports. But i figured i'd wire up everything else too.

In addition this thing can be 80% assembled by the boardhouse.

Screenshot 2020-03-22 at 12.18.51.png

It is busy!

I have been poking some hid devices, and few of them simply don't work. Device can't read any data from them.
Do not trust people. They are capable of greatness.
~ Stanislaw Lem
terriblefire
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Re: TF Riser Revision 0 Arrives

Post by terriblefire »

arkadiusz.makarenko wrote: 22 Mar 2020 14:34
It is busy!

I have been poking some hid devices, and few of them simply don't work. Device can't read any data from them.
I wonder if this is a PHY limitation? Is this something that happens with the HID2AMI?
———
"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."
terriblefire
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Re: TF Riser Revision 0 Arrives

Post by terriblefire »

Ok all done...
all_done.JPG
I put the screw drill hole as 2400 mil (X) 2000 mil (Y) with a size of 200 mil. That was my best measurement. If anyone has a better measurement let me know.
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———
"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."
User avatar
arkadiusz.makarenko
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Joined: 19 Jun 2019 07:36
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Re: TF Riser Revision 0 Arrives

Post by arkadiusz.makarenko »

terriblefire wrote: 22 Mar 2020 16:50
arkadiusz.makarenko wrote: 22 Mar 2020 14:34
It is busy!

I have been poking some hid devices, and few of them simply don't work. Device can't read any data from them.
I wonder if this is a PHY limitation? Is this something that happens with the HID2AMI?
I don't know about hid2ami, but I hope f7xx it may be better.
Do not trust people. They are capable of greatness.
~ Stanislaw Lem

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