PaulJ's H4 Mongrel Build x 2

[PaulJ]

@PaulJ - I have jumper over buffer and that made no difference so its not the buffer.

Yes, believe its a handshake issue. I'll keep looking.

[exxos]

@PaulJ - I have jumper over buffer and that made no difference so its not the buffer.

Odd as there's no real difference from the alpha DMA to the H4 circuit otherwise .

[PaulJ]

@PaulJ - I have jumper over buffer and that made no difference so its not the buffer.

Odd as there's no real difference from the alpha DMA to the H4 circuit otherwise .

Yes it is odd, can't find anything wrong either. :mad:

[exxos]

I don't know if the internal headers are even correct yet. So its best to test with a external drive. You could jumber the floppy buffer in case there's some conflict .

[PaulJ]

Pretty sure internal headers are fine but won't know positively until they work. Wondering if the floppy gets left in a state that locks out the HD... :pullhair:

[PaulJ]

Can't find anything as yet, its like we never get HDCS? Must bomb out prior to asserting HDCS?? Here's a sample from the remake board that functions properly.

C0WKS.png

[exxos]

It looks like HDCS is missing so I'm going investigate it. Not much there, strait shot from DMA chip. D

Looks like its high all the time when it should go low to select the drive.. maybe check resistance on that line make sure its not shorted to VCC ?

[PaulJ]

@exxos Nothing looks shorted to +5 or ground. Nothing open. All looks as one would expect. Maybe I've been looking at it to much today. :? :? US and MEGA headers all look good also. Gotta be something.. I mean its just a %100 nonfictional while the floppy works fine.

[czietz]

Can't find anything as yet, its like we never get HDCS? Must bomb out prior to asserting HDCS?? Here's a sample from the remake board that functions properly.

BTW: Are you sure that the traces are labeled correctly? I'm surprised by the activity on the RESET line. I don't know about Exxos' board, but in an original ST, this is connected to the system-wide reset line. It should therefore be constantly high during the DMA test.

[exxos]

Can't find anything as yet, its like we never get HDCS? Must bomb out prior to asserting HDCS?? Here's a sample from the remake board that functions properly.

BTW: Are you sure that the traces are labeled correctly? I'm surprised by the activity on the RESET line. I don't know about Exxos' board, but in an original ST, this is connected to the system-wide reset line. It should therefore be constantly high during the DMA test.

A good spot. RESET is system wise and should be high all the time after power up like the original ST. The only reason reset may go nuts is if the "flashy clock" jumper is missing, as it breaks the reset line in preparation for the flash-rom booting stuff. If that jumper isn't set, Part of the reset line would be floating.. But I think the LA dump is labeled incorrectly as the machine wouldn't do all that activity with reset going nuts like that.