ST-IDE-ROM Dev Board v1 - BETA Testers

[exxos]

@rubber_jonnie Not sure if I remember this rightly, but did you say a few weeks back that you had some issues with the interface and HD10 or something ?

[rubber_jonnie]

@rubber_jonnie Not sure if I remember this rightly, but did you say a few weeks back that you had some issues with the interface and HD10 or something ?

@exxos Well, sort of.

I was testing the Blitter capability in HDDRIVER V11 and with Blitter performance module enabled, XFRRATE came back as something like 210KB/S transfer rate (Faster was expected) and with the Blitter performance module disabled it was 1360KB/S.

From a user perception point of view it felt the same, but the XFRRATE results seemed clear.

[exxos]

I had a pile of PCBs from @Icky Arrive this morning :cheers:

Now finally got my PCB up and running...It boots from IDE CF... and I have been running my IDE tested program for a couple of hours reading and writing and it seems fine.

I had to file the corner of the IDE connector because it hits the socket as mentioned before :roll:

I do need to scope out the signals to see what resistors are best suited yet.. I pretty much just rammed in 68R everywhere... But I remember some signals were better with a lower value so I need to check them out yet....

IMG_4952.JPG

I am also plotting to move to the 1/8watt resistors (I used them anyway) but making the pads a tiny bit wider so they can lay flat... I may also swap the DIP resistor networks for the smaller resistors as well.

[rubber_jonnie]

@exxos Very nice, when can I get two?

I have finished my H4 remember!

[exxos]

@exxos Very nice, when can I get two?

I have finished my H4 remember!

I got some tests etc to do yet..but I started looking for parts earlier. Hope to start ordering stuff next week.

[rubber_jonnie]

@exxos Very nice, when can I get two?

I have finished my H4 remember!

I got some tests etc to do yet..but I started looking for parts earlier. Hope to start ordering stuff next week.

@exxos Cool, I definitely want two, just let me know. Will likely be in April or when I get paid in 2 weeks as I am ordering some test cables from Olivier at gossuin.be, so budget is committed elsewhere in March I'm afraid :)

[exxos]

@exxos Cool, I definitely want two, just let me know. Will likely be in April or when I get paid in 2 weeks as I am ordering some test cables from Olivier at gossuin.be, so budget is committed elsewhere in March I'm afraid :)

Will likely be a month before they hit my store anyway.

I'm also pondering resistor packs vs individual resistors... Pack are easier but more expensive.. I'm going to try and keep costs low, so may just go with individual ones..

[rubber_jonnie]

@exxos Cool, I definitely want two, just let me know. Will likely be in April or when I get paid in 2 weeks as I am ordering some test cables from Olivier at gossuin.be, so budget is committed elsewhere in March I'm afraid :)

Will likely be a month before they hit my store anyway.

I'm also pondering resistor packs vs individual resistors... Pack are easier but more expensive.. I'm going to try and keep costs low, so may just go with individual ones..

@exxos Cool,that timing works for me :) My Mega1 will get IDE after all :)

Re the resistor packs, are you building the boards or supplying a kit? I think somebody, maybe Icky posted pics of the beta board with just resistors where the DIP sockets for the resistor packs would be, so as long as there is space for a DIP socket, then surely resistors would be an option for board builders? I guess for kits then you're going to need to consider costs.

EDIT: I just noticed resistore where the packs would be on the pic you just posted of the new smaller board.

[exxos]

@rubber_jonnie initially they will be kits. I don't know yet if I will do assembled ones or not yet.

[rubber_jonnie]

@rubber_jonnie initially they will be kits. I don't know yet if I will do assembled ones or not yet.

@exxos Will there be just a bare board option? I can do the ROMs and other parts myself, so all I'd need is the board and the FPGA if that's feasible.