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PAK issues

Problems with your machine in general.
pakman
Posts: 75
Joined: 16 Feb 2018 22:04
Location: Germany

Re: PAK issues

Post by pakman »

Get your Multimeter, we need to confirm some connections..
pakman
Posts: 75
Joined: 16 Feb 2018 22:04
Location: Germany

Re: PAK issues

Post by pakman »

Measure the resistance from J2 pin2 to GND and to VCC
pakman
Posts: 75
Joined: 16 Feb 2018 22:04
Location: Germany

Re: PAK issues

Post by pakman »

Measure the resistance from U1 pin11 to GND and VCC
pakman
Posts: 75
Joined: 16 Feb 2018 22:04
Location: Germany

Re: PAK issues

Post by pakman »

Measure the resistance from U2 pin1 to U1 pin11 to J11 pin2 to J11 pin1 to the CPU pin C02. All should be connected.
pakman
Posts: 75
Joined: 16 Feb 2018 22:04
Location: Germany

Re: PAK issues

Post by pakman »

Measure the resistance from U6 pin17 to VCC and GND
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PhilC
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Re: PAK issues

Post by PhilC »

J2 Pin 2 to GND and to 5V is 4.7K ohm on both.
Same for U1 pin 11 to VCC and GND is 4.7K for both
U2 pin 1 to U1 Pin 11 0 resistance.
U1 pin 11 to J11 2 0 resistance.
which pin is CO2? Can't see it on the pinout. (needs glasses)
And the final one U6 pin 17 to GND and VCC is 4.7K on both
If it ain't broke, test it to Destruction.
pakman
Posts: 75
Joined: 16 Feb 2018 22:04
Location: Germany

Re: PAK issues

Post by pakman »

Another test:
Please set J2 = J3 = J4 = off.
Run GemBench twice:
1. With I & D cache both enabled
2. With I & D cache both disabled
and post the screenshots.
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PhilC
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Re: PAK issues

Post by PhilC »

Here are the two screenshots, slowest is with I and D off. Also btw, I have J11 off to keep slc enabled.
20190219_185545.jpg
20190219_190128.jpg
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If it ain't broke, test it to Destruction.
pakman
Posts: 75
Joined: 16 Feb 2018 22:04
Location: Germany

Re: PAK issues

Post by pakman »

Ok, good news: The L1 cache works, but only in the ROM area. Let's look further..
Please confirm 2 connections:
1. From U6 pin 11 to 68000 connector pin 51 (A22)
2. From U6 pin 13 to 68000 connector pin 52 (A23)
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PhilC
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Re: PAK issues

Post by PhilC »

pakman wrote: 19 Feb 2019 19:54 Ok, good news: The L1 cache works, but only in the ROM area. Let's look further..
Please confirm 2 connections:
1. From U6 pin 11 to 68000 connector pin 51 (A22)
2. From U6 pin 13 to 68000 connector pin 52 (A23)
U6 11 to pin 51 = 0 ohm
U6 13 to pin 52 = 10K.

This is with the 68000 in the socket and not the connector to the motherboard
If it ain't broke, test it to Destruction.

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