Thoughts

[OzOnE]

Hi, all,

This is my first post here.

I've been following the project with interest after Mr TerribleFire mentioned it on his live streams.

I have a small retro collection, including a 2600, 130XE, Jaguar etc., but don't actually have an Atari ST right now. (I know, I know. hehe)

I loved using both the Atari ST and "the other one" in the 90s and beyond. I thought this project was neat, and might inspire me to get hold of another ST.

I wondered if I could help at all with the diag / PCB stuff?

@exxos - Are you intending to release the PCB files eventually (or have already), or will it be closed-source for now?
Either is fine, obviously, I was also just wondering if you are planning to manually route the PCB as well, or just use the autorouter?

tbh, I think the clock frequencies involved are just edging towards the point where manually routing the busses may help with reliability.
If it's only around 32 MHz max, then I guess it's not that fast really, but I haven't used any autorouters in about 10 years, so I'm happy to help if I can.

(I recently did a re-design of the Nintendo 64 and Dreamcast motherboards, and those were both manually routed, albeit with the help of the "Interactive Routing" on Altium.)

I also think this project could be a good opportunity to look into doing some CPLD replacements for certain chips, maybe just for the rarer ones?


And, I reckon you could get some VERY valuable diagnostic info by hooking up various chips on the board to an FPGA dev board.
I've done something similar for CPUs, and things like Roland synth chips.

For things like RAM, you can actually get the FPGA to display chunks of memory in realtime to a VGA output. This is what I did for the synth chip...

r1Ienjx.jpg (71.62 KiB) Viewed 2833 times

If you hook it up to a CPU, you can trace the memory fetches etc.

Obviously it would be nice to have a proper Logic Analyser like TF has, but you don't need anything too fancy to hook up an FPGA board to a CPU, just some IC test clips.

I've been using a Terasic DE1 board for around ten years now, and I've been able to connect it directly to "5 Volt" systems without ever zapping an IO pin. It technically doesn't have "proper" voltage translation on the board, just some 47 Ohm resistors on every GPIO port pin, but that seems to work great.

DiagROM is great, too, but testing the chips directly could be useful for times when the board isn't booting far enough to run the ROM properly.

You can very quickly write some Verilog for other custom chips, too (assuming you can clip onto the PLCC chips easily).


Just throwing a few ideas out there.


P.S. I go by "ElectronAsh" on Twitter etc., but usually OzOnE on forums.

[exxos]

This is my first post here.

I wondered if I could help at all with the diag / PCB stuff?

TerribleFire has offered to route the next board and debug, but hes running behind with things lately, life gets in the way. I suspect we will have this board running by the time he catches up. A new board is a long way off anyway.

@exxos - Are you intending to release the PCB files eventually (or have already), or will it be closed-source for now?

The schematic and pcb layout are already shown. I have not published the PCB files, simply because its large and unless people have a license to work with large pcbs, then its not going to help anyone. Secondly, its not released simply because its untested/buggy. No use having bad versions of stuff floating around either. Ultimately it will be published, but that's a long way off yet.

Either is fine, obviously, I was also just wondering if you are planning to manually route the PCB as well, or just use the autorouter?

I hate the auto router, but it just had to be done that way. I don't have time or patience to manually route huge things anymore. I don't think the router made a bad job of the current board actually. Though its going to get more complicated in the future as stuff is added.

I also think this project could be a good opportunity to look into doing some CPLD replacements for certain chips, maybe just for the rarer ones?

We already working on it.. Have a look around all the hardware topics like the blitter one and STF remake goals.

[OzOnE]

@exxos

Thanks for the reply.

No problem. I'll have a read through the other threads at the CPLD stuff etc., and watching progress.

It's always fun to see the diag stuff. I love the problem solving process.


I get that manual routing is a pain on complex boards, and to be fair, I do see it affecting a design like this too much anyway.

A lot of things like arcade boards used an autorouter, of course, and they can be gigantic boards with very little ground plane.


Keeping an eye on this project. It looks fun.

OzOnE.

[exxos]

I did manually route the first board, its posted up on here somewhere. Took many hours.. then sadly ended up larger than the original board Even so I didn't like how everything was being laid out, so I redesigned the whole thing, and auto routed it the second time.. As were running 8MHz only, the layout isn't to problematical anyway. We have solid 5V and 0V layers, which the STF/E did not have. So should be more stable than the original anyway.

Higher speeds like 32MHz need a bit better layout. But higher speeds stuff will be done on compact smaller boards, be all SMT boards running faster , slower stuff like on the MB will probably plod along at the 8MHz speeds anyway. So we should be pretty safe auto routing if needs be. But would of course prefer manual routing.. but someone like TF would have to put the time into that epic project.