TF CD32 Riser Revision 2 Design Complete

[arkadiusz.makarenko]

Still have some bug in verilog, as I still clash with tf330 somwhere.

Run the complete memory detection in diagrom to see issues.

Diagrom sends rtc interrupt during memory detection (A3000/4000) (at diagrom boot).

How can I check if I clash with higher addresses?
Can you see anything obvious here ?

Code: Select all

wire rtc_decode = A[23:16] == 8'b1101_1100;
wire rtc_int = PUNT_IN & rtc_decode ;


assign PUNT_OUT = PUNT_IN ? (rtc_decode ? 1'b0 : 1'bz) : 1'b0;

assign INTSIG2 = rtc_int; 
assign DSACK = rtc_int?(INTSIG7?2'b10:2'b11):2'bzz ;

assign INTSIG3 = A[3];
assign INTSIG5 = A[5];

[terriblefire]

clock these guys or you'll get logic hazards.

https://en.wikipedia.org/wiki/Hazard_(logic)

[terriblefire]

Put at least rtc_int in an always block...

otherwise any glitch will trigger an interrupt.

Code: Select all

always @(posedge CLKCPU_A) begin 

	rtc_int <= ...;

end

using assign's and combi logic is asking for trouble.

Also your arm code should check the interrupt is still pending before responding.

[arkadiusz.makarenko]

:facepalm:

I should read what is written on the screen, and hold bloody left mouse button when it says to do it if it hangs :D

Saying that adding always and additional check on int signal on arm side, now ram test is successful, workbench boots and clock reads RTC (early days).

Second time I was obsessing about really non issues.

[matt020]

Just a quick post from someone who is following this thread with amazement. Such good progress! Keep it up!!

[wairnair]

Just a quick post from someone who is following this thread with amazement. Such good progress! Keep it up!!

same here!

[arkadiusz.makarenko]

Rtc now can be detected by ATK as msm6242 :)

1602958079115401847416370415696.jpg

Just need to complete setting date and that would be easy stuff more or less ready.

Edit:
Default date need to change... I can't face living in 2020 all the time ;)

[terriblefire]

Sweet.

[arkadiusz.makarenko]

Ok
Writes and reads implemented. I may need to add support for sleep mode and restore after wakeup (Need to wait for new board), but at this point I have done what I could. :)

I have created binaries repository
https://github.com/arkadiuszmakarenko/T ... naries.git

CPLD source code: https://github.com/arkadiuszmakarenko/T ... v1XC9572XL
STM32f722 (still can fit in stm32f730) - https://github.com/arkadiuszmakarenko/TFRiserRev1F722

Time for a bottle of wine.

[terriblefire]

CPLD source code: https://github.com/arkadiuszmakarenko/T ... v1XC9572XL
STM32f722 (still can fit in stm32f730) - https://github.com/arkadiuszmakarenko/TFRiserRev1F722

Time for a bottle of wine.

boards are 80% done manufacturing.

We have keyboard and mouse support? :)