A500 Fast RAM & IDE

[cmorley]

I've dusted off a project I built up ages ago to work on the firmware over the last few days. Originally just 8MB fast RAM and an ATA interface I bodged a few tracks and it now supports a mild overclock.

The CPLD is a Lattice ispMACH 4256V. Code in verilog - mine, not a port of any TF code. I enjoy doing the code and debugging (even when I'm tearing my hair out).

The CPU in it is a MC68000P10 - recycled from China & might be a remarked P8 I don't know. It runs at 13.7MHz stably though 8)

Dev board:

Photo0935.jpg (157.07 KiB) Viewed 8369 times

Obligatory SysInfo shot:

Photo0937.jpg (134.36 KiB) Viewed 8369 times

edit: the shame... the date stamp on the Gerbers is 17 March 2019

[matt020]

Just trying to work out what you've got there....

A 68010 with 8Mb and IDE, yeah?

Would it not be easier just to buy a TF534 or the upcoming TF536 ??

[cmorley]

Normal MC68000P10.

I'm interested in developing hardware so buying something is pointless.

[matt020]

Yeah thats fair enough!

Can you add a 68030 to your board? That would be awesome!

An 030, with fastmem and an IDE port would be just right for an Amiga 500!

[dalek]

Looking good! You must be having fun

I would be stoked to ever get that far!

[terriblefire]

Yeah thats fair enough!

Can you add a 68030 to your board? That would be awesome!

An 030, with fastmem and an IDE port would be just right for an Amiga 500!

There are at least 3 boards that are open source that do that. I think he wants to do his thing.

[arkadiusz.makarenko]

Sometimes it is just about journey, not about destination.

[terriblefire]

Sometimes it is just about journey, not about destination.

Exactly.

[matt020]

There are at least 3 boards that are open source that do that. I think he wants to do his thing.

Ahh I getcha. In that case, nice work! Well done!

[cmorley]

Jens has the high features end covered with the ACA500plus & terriblefire has the 680x0 covered so I am looking at something else. This dev board was initially only about fast RAM and IDE. I added some bodge wires to feed the 68K an separate clock. E and /VMA are now in the CPLD so the timers work correctly.

It boots at 16MHz but isn't stable. I don't know yet if that is my dev board, verilog or the 68K. Next is try a MC68HC000 on it. I bought some from 3 separate Chinese vendors... hopefully at least one chip will be genuine.

At the moment it is about understanding the 68K bus and the system. There is a lot of BS out there on the internet about how the Amiga works... source docs are useful but nothing beats an experiment.