BLITTER RE-CREATION THOUGHTS

[exxos]

Maybe a useful feature could be logic to deal with horizontal scrolling. The cpu doing the math with slow access to RAM is painfully slow.

[ijor]

Exactly. Blitter, potentially, could drive the RAM at its maximum speed and perform one RAM access per cycle. The CPU always takes (at least) 4 cycles for any access, no matter what, even when accessing non-shared FAST RAM.

I saw the ST memory access diagram a few years ago and if I remember correctly, all of the SHIFTER cycles were occupied by either SHIFTER itself or memory refresh DMA during in the border area (e.g. on the top/bottom border all 128 cycles of the scan-line were used by the memory refresh process).
The question is whether it is true, and how to deal with the BLiTTER access cycles vs memory refresh cycles.

Of course it is true. Not only that, even if any SHIFTER slot would be not used for ram refresh, the chipset is still not designed for allowing the CPU to use them ...

As I said already, precisely after the paragraph you quoted:

But this would require a Blitter closed coupled to the RAM. It won't be possible to do this with the standard chipset on a standard motherboard.

Now, in theory it should still be possible to implement this, but it would be complicated. You could, e.g., build a board with Blitter and its own RAM that would "replace" the on board ram, and that it would bypass the chipset control over the RAM. You would need to somehow connect to the RAM data bus (say, at the Shifter socket), and you would also need to snoop some MMU signals.

So, it is doable on a standard ST with standard chipset, if you insist. I'm posting that just for completion and for the fun of considering the idea

[exxos]

Does anyone of the pinout overlay on the 10M02SCU169A7G ?

I have the pinlist, plus templates for schematics.. BUT.. There is nothing on the lib to indicate what pin is what on the PCB... its just a slab of pins.. So trying to right out what pins are on the right side from top to bottom is hard going unless I highlight each pin on the schematic and see which pins on the PCB light up.. its a nightmare with 100+ pins.

EG:

Capture.PNG (47.09 KiB) Viewed 266 times

Whats the top right pin called ? No idea. I need a drawing like above but with the pins named so I can see what pin goes where on the schematic.. but can I find one anywhere..

All I have is..

1.PNG (38.85 KiB) Viewed 266 times

I don't know what it is with Intel datasheets. Pretty much ever datasheet i've seen has a proper pin overview.. but not Intel stuff ?! Pinout should be the first thing in the datasheets.. but can I find it anywhere... maybe I am blind ?!

[Icky]

Does anyone of the pinout overlay on the 10M02SCU169A7G ?

I have this. Not sure where you got that one from.

[exxos]

I have this. Not sure where you got that one from.

Think my lib came from mouser.

[ijor]

I have the pinlist, plus templates for schematics.. BUT.. There is nothing on the lib to indicate what pin is what on the PCB... its just a slab of pins.. So trying to right out what pins are on the right side from top to bottom is hard going unless I highlight each pin on the schematic and see which pins on the PCB light up.. its a nightmare with 100+ pins.

They provide the pinout in Excel spreadsheets here:
https://www.intel.com/content/www/us/en ... it-dp.html

Package and footprint information is here:
https://www.intel.com/content/www/us/en ... ckage.html

Quartus outputs a specific pinout file, that according to the documentation, can be read by commercial software like Cadence. Don't know if Eagle or Kicad can read those files. You can also see a graphic pinout representation at the Quartus pin planner.

I understand they don't provide footprint libraries anymore.

I don't know what it is with Intel datasheets. Pretty much ever datasheet i've seen has a proper pin overview.. but not Intel stuff ?!

Not trying to justify Intel. But I understand that this is typical for most modern FPGA devices, not just from Intel/Altera. The datasheet covers too many device parts and variations, each one having too many pins. It probably wouldn't be practical to include all the pinouts in the datasheet.

[exxos]

I found this last night, will do the job

10m02scu169i7g.png (154.28 KiB) Viewed 214 times