I'm not really "wild" .... i offered up my array of Logic Analysers for testing.
The TF1200 Design Complete
Moderators: terriblefire, Terriblefire Moderator
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Re: The TF1200 Design Complete
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"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."
"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."
Re: The TF1200 Design Complete
Oh my! Hope to see this up and running soon
Re: The TF1200 Design Complete
@natas i've denied your posting. Please read the forum rules before posting further.
Consider this as Strike 1. 3 and you're out.
Consider this as Strike 1. 3 and you're out.
If it ain't broke, test it to Destruction.
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Re: The TF1200 Design Complete
I've cleaned up this thread. It added no value.
One thing to note. The card has SDRAM not SRAM.
One thing to note. The card has SDRAM not SRAM.
———
"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."
"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."
Re: The TF1200 Design Complete
Out of curiosity (and because it was being talked about on another forum) what is the reason for having Zorro II RAM on the TF1200?
Other than the EC020 on the A1200 motherboard are there any other DMA masters that can access the Zorro II RAM address space?
Is it primarily for when Buffee is disabled and you're using the onboard 14MHz EC020?
A technological reason I'm not familiar with?
Other than the EC020 on the A1200 motherboard are there any other DMA masters that can access the Zorro II RAM address space?
Is it primarily for when Buffee is disabled and you're using the onboard 14MHz EC020?
A technological reason I'm not familiar with?
Principal ASIC Engineer - SystemVerilog, VHDL
Thalion Webshrine - http://thalion.atari.org
STf,STfm,STe,MegaST,MegaSTe,Falcon060
A500+,A600,A4000/060,CD32,CDTV
Thalion Webshrine - http://thalion.atari.org
STf,STfm,STe,MegaST,MegaSTe,Falcon060
A500+,A600,A4000/060,CD32,CDTV
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Re: The TF1200 Design Complete
Its because it was asked for this way by Renee so that DMA might be possible from the IDE interface.alexh wrote: ↑Wed Apr 06, 2022 4:29 pm Out of curiosity (and because it was being talked about on another forum) what is the reason for having Zorro II RAM on the TF1200?
Other than the EC020 on the A1200 motherboard are there any other DMA masters that can access the Zorro II RAM address space?
Is it primarily for when Buffee is disabled and you're using the onboard 14MHz EC020?
A technological reason I'm not familiar with?
———
"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."
"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."
Re: The TF1200 Design Complete
Any update for this project?
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- Posts: 5389
- Joined: Mon Aug 28, 2017 10:56 pm
- Location: Glasgow, UK
Re: The TF1200 Design Complete
This board was created for the Buffee team so they could test it in a 1200. I've given them all the files.
———
"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."
"It is not necessarily a supply voltage at no load, but the amount of current it can provide when touched that
indicates how much hurting you shall receive."