I'm not familiar with the PiStorm at all, but there are many things here that don't make much sense to me.
In first place, why use an obsolete MAX II CPLD??? The only reason you usually use a very old CPLD is because it is 5V tolerant. But this one is not. So I don't understand what is the point. You could use a faster and much more powerful MAX 10 for about the same price. Don't know, may I be I miss something.
Some quotes from the other thread, that I thought better to follow up here.
rubber_jonnie wrote: Sat Jan 03, 2026 5:05 pm
It was suggested to me that Musashi was not the best route for PiStrom on my Amigas, and I can't imagine it would be any better on the ST PiStorm.
Bare metal is definitely the way to go but in all honesty if there is no bare metal option for the ST it might be a bit of a bust.
Not sure I agree with that approach. As I see it, the whole point of using an RPI is to have all the power of full Linux. Ethernet, Wifi, Bluetooth, full Internet, Storage, HDMI ... You name it, everything is built-in.
Not using bare metal would obviously imply a "small" performance hit. But there are methods to make it almost as fast. Granted, I'm not an RPI expert, so I can't say I have tested this.
stephen_usher wrote: Sat Jan 03, 2026 11:17 pm
With some ST chipsets it's sort of working some of the time but a lot of the arbitration states are not fully implemented or not implemented at all. It seems to be hitting timing latency issues.
The PiStorm only really works well on the Amiga because the CPU doesn't have to worry about bus arbitration as all the peripherals are hidden behind the custom chips, and it's the bus arbitration which is the hard and time critical bit.
I can only assume you are using the term "bus arbitration" in an "unusual" sense. Because otherwise this doesn't make much sense to me. Bus arbitration, in an 68K context, means DMA as used by Blitter, or when accessing the floppy or hard disk. I don't think this is very complicated, and certainly it is not time critical. E.g., nothing will happen if the CPU grants the bus a few cycles later. It might break a couple of Blitter demos that require cycle accuracy. But the CPU emulator is not cycle exact anyway, so this is a non-issue.
Again, I'm not familiar with the PiStorm at all, so I might be missing some important details.