The latest member of the family

[alexh]

Good luck.

Amiga A500 (non-plus) are not usually this much trouble you know. I think you unfortunately got a bad one.

I've always considered my A500 (half ECS) as "indestructible" bar the floppy disk drive.

[rubber_jonnie]

OK, so both U34 and U35 buzz out to Agnus fine on the bottom of the board. I want to do it topside too and direct to the Agnus rather than the socket.

It's starting to suggest an issue on the RAM side of U34 & U35 though, especially since three of the RAM IC's (It was 4) are still cold during operation.

[rubber_jonnie]

Good luck.

Amiga A500 (non-plus) are not usually this much trouble you know. I think you unfortunately got a bad one.

I've always considered my A500 (half ECS) as "indestructible" bar the floppy disk drive.

Thanks, it's very annoying as it was working just fine until I started upgrading, then it started this missing RAM thing. Initially intermittent with a green screen, and it would eventually power on, but now just green screen all the time.

I'll figure it out I expect but it's looking like a slow one.

[rubber_jonnie]

OK then, so all the connections From Agnus to U34 and U35 are good, they all connect to the Agnus itself on the top of the board, so I will now have to look at everything between RP201/RP202 & RP203 to the RAM since I know that all the connections to the resistor packs are good too.

It's all about the RAM end for now.

[stephen_usher]

Checked at the CPU? An iffy address line in the lower 16 lines would stop booting at all.

You have that board in the CPU slot, which I would be suspicious of having a bad contact. If the CPU isn't pulling an address line low then the pull-up will bring it high, meaning that the RAM and ROM addresses wouldn't be selected.

[rubber_jonnie]

Checked at the CPU? An iffy address line in the lower 16 lines would stop booting at all.

You have that board in the CPU slot, which I would be suspicious of having a bad contact. If the CPU isn't pulling an address line low then the pull-up will bring it high, meaning that the RAM and ROM addresses wouldn't be selected.

For the time being I've taken the CPU/IDE/8MB upgrade out and I'm running the original CPU and ROM since I know they work and it uncomplicates things. I had initially thought it was the upgrade board and spoke to the seller (Retro Lemon) at length, but then it started working. I opened it up to install RGB2HDMI and then things went wrong.

From what I've read, the green screen of death means the CPU is running and the ROM is accessible, however the system can't find at least 256KB of onboard RAM.

Next up will be a thorough buzz out of the RAM traces, probably also a buzz out of the CPU to Agnus traces and some probing of the RAM IC's, see what the signals look like.

Bit of a head scratcher since I know all the custom IC's do actually work and so do my spares.

[rubber_jonnie]

OK, so I have checked the address lines, all have activity, as do _RAS/_CAS and _W/E. _O/E is tied to GND for all of them as per the schematic.

I see no activity at all on the data lines however so I will check the data path next, and of course, it goes via the trapdoor connector.

[stephen_usher]

That would suggest that the /LATCH signal (pin 25 Gary) isn't reaching the 373s, though you should at least see (at the CPU) data from the ROM.

[rubber_jonnie]

That would suggest that the /LATCH signal (pin 25 Gary) isn't reaching the 373s, though you should at least see (at the CPU) data from the ROM.

The Latch signal is present all the awy from Gary to the 373's. However if you look at U10, U11, U12 and U13, I can see signals there on the CPU side.

Screenshot 2025-04-17 at 12.57.51.png (531.99 KiB) Viewed 51 times

On the other side, so GARY/AGNUS I see nothing at all. Like you say that might suggest a bad latch signal but that is present at the 373's. I need to recheck the _OEB and _OEL signals as I think I may have missed something, however I see signals for both at GARY when I power on, then they stay high.

But like I said, I see nothing on the right hand side of the data path ICs, but they are all good on the left.

[stephen_usher]

/OEB and /OEL are for CPU reads from RAM. If they're never happening, and Gary is tested then it suggests that Gary isn't recognising that it's a RAM read and hence isn't enabling the transfer. That could be an address line on Gary being bad.