What number are you getting in coremark?LarryL wrote: Mon Dec 01, 2025 2:26 pm But now I have found out, that there seems to be no difference at all between x1 and x2 anymore…
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With Gembench and with Coremark68k I am getting exact same results, regardless of jumpers being in x1 or x2 position (switching J102,104,105 from 1-2 to 2-3)
Wondering if you are always in 1x or 2x mode regardless of the jumpers?
(can't test anything other than 2x mode myself at the moment, I have a bit of a special go-fast firmware in my computer)
It's very possible or rather probable that it could also be the fault of shoddy firmware codeLarryL wrote: Mon Dec 01, 2025 2:26 pm BTW: none of my boards will even start with 25MHz and one is completely unstable with 32MHz (I suspect the 68150FN33 here, the others have FN40 equipped).
And/or a combination of setup/hold or pin-change timing variations on chips that made those speeds work on mine but not yours -- work as in got to desktop at least, I don't do extensive tests on all the oscillators I have so I can't know if they would have been stable at length.
That particular firmware works from very slow to fast clock a bit by "accidential luck". There could in theory be some speeds in the medium range where it wouldn't be so lucky.
I did start a different path with everything clocked what I thought was properly.
Felt good about it but turned out not working on a different computer.
So then I quit it basically. Testing ~10 permutations when I make changes is bad enough, doing it again but on a second computer isn't going to happen.
(since I can't maintain two different codebases the sensible thing would be to toss that other new one away. But it brings just too good of a performance increase on my computer so I'm running it here and will probably keep it for that)
Realistically what I think will have to happen next time I get motivation to re-work the firmware is that only 2 oscillator speeds would be tested/supported, and 1x mode dropped. Or something like that.
If not, I really don't think I'll get any motivation to work on the firmware at all. It's just too huge of an undertaking supporting and testing all variations, and since it's of little interest to myself it ends up feeling like a job, so I basically avoid working on it at all :/
Apart from the huge workload, some problems with trying to support everything from very slow to very fast ends up being;
with a fast bus, I'm shutting off some peripherals with long hold times a bit slightly _before_ the cpu has actually read the data - otherwise that peripheral lingers active for too long into the next cycle.
When going slow, this can't be done because then the data would be gone by the time the cpu wants it.
Not a problem when designed for a specific speed in mind but a huge hassle when supporting any clock - thus I should get rid of the any clock, probably.
Sorry I realised that turned into a bit of a rant more than some kind of answer
