Fielding some questions about DSTB1

Discussion and support for the DSTB1 & DFB1 boosters by BadWolf..
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Badwolf
Posts: 2230
Joined: Tue Nov 19, 2019 12:09 pm

Fielding some questions about DSTB1

Post by Badwolf »

User wrote: Greetings Badwolf,

Congratulations for th excellent research you performed!

If you let me, I have some questions regarding the accelerator,

-Can the blitter be used for games or other things with the accelerator being used at 16 MHz?
I don´t mean to use the on board fast RAM, I want to use the blitter and DMA audio with the common ST-RAM.
Blitter may still be used for ST-RAM to ST-RAM work and, if using AltRAM.PRG (rather than AltROM.prg) from ROM to ST-RAM.

I'm looking at whether BLITFIX.PRG may be modified to make this simpler.

I also hope that, given time, the blitter can be made to work reliably in all modes.
-You are using DRAM, that requires refreshing circuit and logic... is the CPLD being used for this purpose?
Personally I own plenty 2Mx16bit SRAM chips, where the refreshing need can be avoided at all.

Can be the accelerator simplified in order to discard the CPLD, via using SRAM, and add some standard logic chips to detect when the CPU is accesing the ST-RAM bus?
The primary distinctive element of this booster is that it does indeed use SDRAM and hence requires controller logic. The aim is for the lowest price. When available(!) the CPLD + SDRAM is usually much cheaper than a smaller logic chip and SRAM.

An SRAM-based AltRAM acclerator would be much simpler and could potentially be much faster. Exxos has his SEC booster under development, for example. This will be a much more impressive board, but the trade-off is cost.

There would be little point reworking this booster into an SRAM board as this is a booster build around SDRAM.
-I suppose the accelerator uses 16 MHz for instruction execution, but 8 MHz for bus access, is this correct?

Thanks in advance,
The CPU runs at 16MHz whenever it's not accessing the ST motherboard (where it switches down to 8MHz). Non-ST-RAM instructions and AltRAM access is therefore accelerated.

Regards,

BW
DFB1 Open source 50MHz 030 and TT-RAM accelerator for the Falcon
DSTB1 Open source 16Mhz 68k and AltRAM accelerator for the ST
Smalliermouse ST-optimised USB mouse adapter based on SmallyMouse2
FrontBench The Frontier: Elite 2 intro as a benchmark
mst
Posts: 25
Joined: Sat Jan 30, 2021 4:36 pm

Re: Fielding some questions about DSTB1

Post by mst »

Worried about blitter...


Can you test if this game is reliable at 16 MHz (using the booster)?

https://www.gp32spain.com/foros/attachm ... 1647869522

Keyboard controls are provided using "nogpad.prg" executable, (W,S,A,D,B,N,M keys)





The idea of SRAM is to simplify manual based manufacturing,
your soldering skills illustrated in the video are awesome :)

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Badwolf
Posts: 2230
Joined: Tue Nov 19, 2019 12:09 pm

Re: Fielding some questions about DSTB1

Post by Badwolf »

Blitter is not prohibited from working in ST-RAM, it's merely prohibited from working in AltRAM at the moment as I don't think it's reliable. A competent verilog programmer would probably be able to fix it.

The GEM desktop runs in AltRAM so blitter has to be turned off on the desktop.

There's nothing stopping a program that blits ST-RAM to ST-RAM from working.

Exxos has done some experiments re-enabling the blitter code here. He's using some different compilation settings to me to try to find the sweet spot: https://www.exxosforum.co.uk/forum/viewt ... =10#p83897

BW
DFB1 Open source 50MHz 030 and TT-RAM accelerator for the Falcon
DSTB1 Open source 16Mhz 68k and AltRAM accelerator for the ST
Smalliermouse ST-optimised USB mouse adapter based on SmallyMouse2
FrontBench The Frontier: Elite 2 intro as a benchmark
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